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DoCD v.6.01 offers real time, non-intrusive debug capability, enabling a pre-silicon validation and post-silicon, on chip software debugging. The DoCD debugging system allows hardware breakpoints, trace, variables watch and multi C sources debugging while the Debug Software can work both as a hardware debugger and a software simulator.
Some tasks can be validated at software simulation level and after this step, users can continue real-time debugging, by uploading code into silicon. Other advantage of an on-chip debugger, is its improved design productivity in an integrated environment, with graphical user's interface.
The DoCD can display/modify memories' content, processor's and peripherals' register windows, along with information tracing and ability to see the related C/ASM source code. The debug software is a Windows based application, compatible with all existing compilers and assemblers.
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The Debug IP Core is a real-time hardware debugger, which provides an access to all chip registers, memories and peripherals, connected to the IP Core. It controls CPU work, by non-intrusive method. The Debug IP Core is provided as VHDL or Verilog source code, as well as CPLD/FPGA EDIF netlist.
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For more information, view the DoCD datasheet or visit Digital Core Design.
This article originally appeared in EE Times Europe.
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